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The need for embedded processors to interact with the physical world around them is far from new. At the same time, however, the combo of embedded processors and analog circuitry keeps reinventing itself to enable new applications, such as renewable energy, smart audio and the Internet of Things (IoT).
It’s exciting to see how embedded processors combined with analog circuits enable a wide range of applications, from smart retail and laptop docking stations to automotive dashboards and tiny, unattended remote monitoring devices. Some trends are quite recent, however, and they’re changing the way we think about digital-analog system integrations.
Alongside these applications, new design challenges emerge when engineers combine analog with various embedded processors—especially when embedded processors designed to work with analog have also evolved over the years to facilitate greater battery efficiency and lower power consumption.
Two specific issues currently dominate the embedded system designs working in tandem with analog, as outlined by Dave Gillespie, R&D Fellow at Synaptics.
Analog on digital-friendly nodes
One perennial challenge with embedded analog systems is that progress in silicon technology diverges between digital and analog. Processors are driving manufacturing process selections toward more advanced nodes that facilitate higher performance and lower supply voltages, while analog front-end (AFE) circuits often use higher I/O voltages for better dynamic range.
“Ever smaller feature sizes make digital logic faster and cheaper, but at the same time, they are less and less appropriate for analog circuits,” Gillespie said. “Consequently, sometimes a package that looks like a chip from the outside actually has multiple silicon dice inside.”
In fact, that package is internally wired, so one part can be fabbed in a digital-friendly process and the other in an analog-friendly process. That’s one way to deal with the challenge: simply incorporate the analog circuit into the chip while taking advantage of digital calibration to mitigate analog non-idealities.
In this case, a primary challenge is deciding what you can put in a system-on-chip (SoC) and what really needs to remain external. “That is often a question of signal level and bandwidth,” Gillespie said. “But the answer is always changing, particularly with the advent of very high-performance CMOS RF circuits that integrate well with digital logic.”
Sam Geha, executive VP of the IoT, compute and wireless business at Infineon Technologies, acknowledged that the most advanced analog and mixed-signal designs have leveraged process technologies specifically designed from the bottom up for optimal analog performance.
“Those process technologies are not well suited for microcontrollers or microprocessors due to performance and embedded memory limitations,” he said.
Geha added that the industry is overcoming this challenge by designing highly capable analog peripherals in standard CMOS or CMOS/NVM process technologies. He quoted the example of PSoC microcontrollers that have been “analog heavy” since their inception.
“This simplifies the design of sensor-based systems by delivering a scalable and reconfigurable architecture that integrates programmable AFEs and a signal processing engine that can calibrate and tune the AFE in software.”
Delegating operations on embedded CPUs
The second challenge that Gillespie mentioned relates to which operations to perform on the embedded CPU or CPUs—that is, which in special-purpose processors, and which in analog circuitry.
“You need a lot of analog expertise to call this decision properly,” he said. “To do an efficient SoC today, you need deep skill with a wide variety of processing cores, not just with a CPU and its bus architecture.”
Moreover, at high frequencies, it’s also often necessary to pre-process signals with a dedicated DSP or video codec core right next to the data conversion stage. You also must design methodology that can reliably integrate the high-bandwidth analog blocks with your digital and memory IP—especially for designs that take inputs from a large array of sensors. This is because routing digitized data from each channel to digital, or connecting per channel control bits from digital, can take quite a bit of space.
“Sometimes, it’s useful to design compact and efficient serial interfaces for these data transmissions,” Gillespie said.
Geha echoed this sentiment, while also explaining how Infineon’s PSoC microcontrollers enable designs to act on and/or send aggregated, pre-processed and formatted sensor data over serial communication interfaces to host processors. He also mentioned the above issues as a key challenge besides interfacing embedded processors with analog circuitry.
“In some newer applications, which require higher dynamic range, extra attention is required to ensure that the operation of the embedded processors will not degrade the performance of the analog circuitry,” Geha said.
What’s next for analog in embedded systems?
When asked about what’s next in this design space, Geha said that while embedded processors seek to be more energy efficient, the responsibility will be on the mixed-signal circuit operating close to the real world to make high-quality decisions in the always-on domain at extremely low power.
“As a result, computing may move closer to the sensor than what has been done in the past,” he said. “This, combined with the ability to sense multiple measures in real-time and extract meaningful second order, will be unique challenges in the future.”
Geha added that there might also be a case to integrate analog into the same die as the microprocessor. For certain markets like some healthcare segments, however, analog should be in a chiplet at earlier technology nodes, enabling heterogenous system-in-package solutions.
