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Nvidia has built a software library for the acceleration of computational lithography workloads, enabling order-of-magnitude speedups for these workloads when combined with the latest GPU hardware. The library, CuLitho, will be used at Taiwan Semiconductor Manufacturing Co. (TSMC) beginning in June. Accelerating computational lithography has the potential to improve yield, thereby reducing cost per chip. Other benefits include reducing the carbon footprint associated with this workload, faster turnaround and enabling advanced process nodes with tiny feature sizes.
“CuLitho will accelerate not just mask making but the entire development cycle type for any foundry that uses it,” said Vivek Singh, VP of accelerated computing at Nvidia. “The second benefit of CuLitho is even more profound… the current calculations of computational lithography, large as they are, may not actually be good enough to make the chips of tomorrow. Those chips will require new technologies, which could require 10 times more computation.”
Computational lithography as a field began around 30 years ago when feature sizes reduced below the wavelength of light used for patterning. Masks had to be adjusted to compensate for diffraction patterns, which began to affect the features created. As feature sizes have shrunk further, algorithms that calculate holes in the mask required to produce coherent features in silicon have become more and more complex, and the shapes they predict are less and less intuitive. Calculating the exact sizes and shapes of the holes in the mask has become a significant computational problem. It is the largest computational workload in chip design and manufacturing today, consuming tens of billions of CPU hours annually.
Computational lithography uses two main technologies today: OPC (optical proximity correction) and ILT (inverse lithography technology). ILT is more advanced than OPC, but more computationally expensive. CuLitho should help enable more widespread use of ILT techniques, which allow more of the wafer area to be in focus, improving yield and reducing cost per chip. As feature sizes continue to shrink, ILT is moving from a nice-to-have to a must-have, Singh said.
Both OPC and ILT require data center levels of computing, either in a mask fabrication company or in the foundry. According to Singh, these data centers are growing faster than Moore’s Law.
“Soon there may not be enough computers in a fab to solve this exploding problem,” he said. “Today, if a silicon fab has three data centers, it will need 100 data centers by the end of this decade. If the trend of the last 15 years continues for only a few more years, that’s not feasible. And what about power? 45 MW might be OK, but at 45 GW, something’s got to give.”
Nvidia spent almost four years developing new algorithms to accelerate the underlying calculations of computational lithography, focusing on accelerating the primitives of these algorithms, which include convolutions (also found in AI workloads, convolutions are easy to parallelize, while other primitives used in computational lithography may be harder). The result is a new Cuda acceleration library called CuLitho. When combined with the latest Nvidia GPU hardware platforms based on the H100, the speedup is up to 42×.
In his keynote address this week at Nvidia GTC, Nvidia CEO Jensen Huang said H100 has 89 masks and using CPUs to design each mask takes 2 weeks each—this can be reduced to a single eight-hour shift with CuLitho GPUs, he said.
“TSMC can reduce their 40,000 CPU servers used for computational lithography by accelerating with CuLitho, on just 500 DGX-H100 systems [2000 GPUs], reducing power from 35 MW to just 5 MW,” Huang said, adding that this will help TSMC reduce prototype cycle time, increase throughput, reduce carbon footprint of their manufacturing, and prepare for 2 nm and beyond.
TSMC will be qualifying CuLitho for production starting in June.
Nvidia is also partnering with EUV equipment maker ASML and EDA tool vendor Synopsys.
“We are planning to integrate support for GPUs into all of our computational lithography software products,” ASML CEO Peter Wennink said in prepared remarks. “Our collaboration with Nvidia on GPUs and CuLitho should result in tremendous benefit to computational lithography, and therefore to semiconductor scaling. This will be especially true in the era of high NA extreme ultraviolet lithography.”
“Computational lithography, specifically optical proximity correction, or OPC, is pushing the boundaries of compute workloads for the most advanced chips,” Synopsys CEO Aart de Geus said in prepared remarks. “By collaborating with our partner Nvidia to run Synopsys OPC software on the CuLitho platform, we massively accelerated the performance from weeks to days! The team-up of our two leading companies continues to force amazing advances in the industry.”
While computational lithography today is based on Maxwell’s equations, AI-based computational lithography techniques “are in the works,” Singh said, adding that he expects AI to enable further speedups in the future.