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Staff Engineer Elect Design At Infineon Technologies

Location: Bengaluru

Company: Infineon Technologies

Main tasks

  • This position is for Physical Design and Timing Closure of complex, low power SoCs targeted for IOT and MCU markets.
  • Candidate will be responsible to drive die area, performance, power goals during physical design implementation.
  • Candidate will work on various stages of physical design implementation which includes floorplanning, power grid design, place and route, clock tree synthesis, timing closure, Static/Dynamic IRdrop, physical verification checks.
  • Candidate is expected to have deep understanding and hands-on experience in implementing SOCs with multiple voltage islands, power islands and other power reduction techniques.

Your Profile

  • Bachelor’s or Master’s degree with specialization in VLSI design
  • Hands-on experience in physical design and timing closure of SoCs
  • Experience of industry standard tools for physical design and signoff
  • Experience in scripting languages (shell, perl, tcl) and Make flow
  • Understanding of 40nm/28nm technologies and associated physical design challenges
  • Must be a good team player and should have desire to learn and explore.

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